System for regulating the level of an amplified signal in an amplification chain

ABSTRACT

This invention relates to a regulating system for regulating, with respect to a reference level (Vref), the level of an amplified signal ( 108 ), said regulating system comprising: -attenuation means ( 201 ) for generating an attenuated signal ( 202 ) from said amplified signal ( 108 ) according to a programmable attenuation factor, -conversion means ( 203 ) for converting said attenuated signal ( 202 ) in order to generate an output signal ( 204 ) intended to be compared with said reference level (Vref).

FIELD OF THE INVENTION

The invention relates to a regulating system for regulating, withrespect to a reference level, the level of an amplified signal in anamplification chain.

The invention has many applications, in particular in gain controlsystems that are used in tuners.

BACKGROUND OF THE INVENTION

FIG. 1 shows a tuner comprising an amplification chain associated with aregulating system that is known from the prior art. This tuner allowsthe reception and processing of a radio-frequency (RE) signal 101 andcomprises, arranged in series:

a variable-gain amplifier 102 for amplifying the radio-frequency signal101. The amplifier 102 comprises a MOSFET amplification transistor Tconnected to an integration capacitor C1, and the voltage level at theterminals of said integration capacitor C1 determining the gain of thetransistor T,

a selective filter 103 being dedicated to attenuate the image frequencyand also the adjacent channels,

a mixer 104 for carrying out a change of frequency of the amplifiedinput signal 101, by multiplying said amplified input signal 101 with aperiodic signal generated by an oscillator 105,

an intermediate-frequency filter 106,

an intermediate-frequency amplifier 107 that outputs an amplified signal108,

a surface wave selective filter 109,

a demodulator 110 for generating a demodulated signal 111.

The regulating system known from the prior art comprises:

a level detector 112 comprising a diode D and a capacitor C2. These twoelements constitute a detector for detecting the peak amplitude of theamplified signal 108,

a switch 113 for selecting a reference level Vref_(i) from a set ofreference levels (Vref₁, . . . , Vref_(N)),

a comparator 114 for comparing the level of the signal generated by thedetector 112 with the reference level Vref_(i). The comparator 114generates an output current I_(AGC) that is proportional to thedifference in level between the signal generated by the detector 112 andVref_(i). The output of the comparator 114 is connected to the capacitorC1 of the amplifier 102 such that the current I_(AGC) charges ordischarges the capacitor C1. As long as the amplified signal 108 doesnot have a level that is equal to the reference level Vref_(i), anon-zero current I_(AGC) is generated, which varies the voltage at theterminals of the capacitor C1 and thus leads to a variation in the gainof the transistor T until the output signal of the level detector 112reaches the reference level Vref_(i).

These regulating means exhibit a certain number of limitations.

The comparator 114 receives on one of its inputs the reference levelVref_(i), which is chosen from a set of reference values. Theconsequence of this is that the operating point of the level detector ismodified. Since the characteristics of the level detector vary as afunction of the operating point, the response time of the control loopchanges when different reference levels are applied to the input of thecomparator.

The use of a peak amplitude detector degrades the performance of thetuner in terms of “cross-modulation” (i.e. there is an increase in thespectral interaction between a desired frequency channel and a modulatedfrequency spectrum), in terms of “intermodulation” (i.e. there is anincrease in the spectral interaction of two frequency channels) and interms of “pulling” (i.e. there is an increase in the sensitivity todisturbance of the oscillator 105 by radiation).

Moreover, the use of such a peak amplitude detector is restrictive inthat it does not allow the level of a SECAM-modulated input signal to beregulated. This is because the detection of the peak amplitude of suchan input signal having been positively modulated is not a good indicatorof its level.

SUMMARY OF THE INVENTION

It is an object of the invention to propose a new architecture for aregulating system, which overcomes the limitations of the systems knownfrom the prior art.

For this purpose, the regulating system comprises:

-   -   attenuation means for generating an attenuated signal from said        amplified signal according to a programmable attenuation factor,    -   conversion means for converting said attenuated signal in order        to generate an output signal intended to be compared with said        reference level.

By contrast with the prior art where the level of the amplified signalis selected by modifying the reference level, the level of the amplifiedsignal is selected according to the invention by modifying theattenuation factor of the attenuation means which are placed in front ofthe conversion means. It is therefore the amplified signal which isdirectly attenuated.

In this regulating system, the output signal generated by the conversionmeans is always compared to the same reference level. If this comparisonis carried out using a comparator, the linearity of the comparison isimproved since the comparator always operates around the same operatingpoint, which can thus be known and optimally controlled.

In a preferred embodiment, the regulating system is characterized inthat:

said attenuation means comprise a network of resistances defined by aset of π-structures connected in series, each node of the π-structuresbeing connected to a switch intended to be activated for defining saidprogrammable attenuation factor,

said conversion means comprise processing means for generating saidoutput signal with a level proportional to the square of the effectivevalue of said attenuated signal.

Such structures allow for the resistances to be easily dimensioned suchthat the equivalent output impedance of said resistance network isidentical irrespective of the attenuation factor, and thereforeirrespective of the desired level for the amplified signal. It is thuspossible to adapt the attenuation means and the conversion means interms of impedance, and thus to control and optimize the behavior of theconversion means, and to do so for an amplified signal having a levelthat varies over a dynamic range of 15 dB.

The use of a detector for detecting the square of the effective valueallows to carry out a smoothed measurement of the level of the amplifiedsignal, without taking the rapid temporal fluctuations into account.Thus, this regulating system can be used to regulate the level of aSECAM-modulated input signal.

In a preferred embodiment, the regulating system is characterized inthat the switches are intended to be activated by a command worddelivered by a digital bus.

The use of switches that are activated by a command word allows toeasily program the level of the amplified signal.

In a preferred embodiment, the regulating system is characterized inthat it comprises a voltage comparator including an adjustablevoltage/current converter, for generating an output current signalI_(AGC) being proportional to the difference between said output signaland said reference level.

This characteristic allows to easily vary the time constant of theregulating system.

The invention also relates to an integrated circuit and to a tunercomprising a regulating system of the type described above.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be further described with reference to examples ofembodiment shown in the drawings to which, however, the invention is notrestricted. In the drawings:

FIG. 1 shows a tuner comprising an amplification chain associated with aregulating system known from the prior art.

FIG. 2 shows a tuner comprising an amplification chain associated with aregulating system according to the invention.

FIG. 3 shows one embodiment of the attenuation means having aprogrammable attenuation factor according to the invention.

FIG. 4 shows one embodiment of the conversion means for converting anattenuated signal according to the invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 2 shows a tuner comprising an amplification chain associated with aregulating system according to the invention. The amplification chaincomprises the same elements as those described in relation to FIG. 1.The regulating system according to the invention comprises:

attenuation means 201 for generating an attenuated signal 202 from saidamplified signal 108 according to a programmable attenuation factor,

conversion means 203 for converting said attenuated signal 202 in orderto generate an output signal 204 intended to be compared with saidreference level Vref.

A comparator 205 is used for comparing the output signal 204 and thereference level Vref. The comparator 205 generates an output currentI_(AGC) that is proportional to the difference between the level of theoutput signal 204 and the reference level Vref. The output of thecomparator 205 is connected to the capacitor C1 of the amplifier 102such that the current I_(AGC) charges or discharges the capacitor C1.Since the level of the output signal 204 is not equal to the referencelevel Vref, a non-zero current I_(AGC) is generated, which varies thevoltage at the terminals of the capacitor C1 and thus leads to variationin the gain of the transistor T until the output signal 204 reaches thereference level Vref. When this stable state has been reached, the levelof the amplified signal 108 is attenuated with respect to the referencelevel Vref as a function of an attenuation factor having a value that isdefined by the attenuation means 201.

FIG. 3 shows one embodiment of the attenuation means 201 having aprogrammable attenuation factor according to the invention.

The attenuation means comprise a network of resistances defined by aserial connection of π-structures. Several π-structures are thusarranged in series so as to define various attenuation factors, bycombining the attenuation factors of each π-structure:

a first π-structure comprises the resistance Rs1 and the two resistancesRp1,

a second π-structure comprises the resistance Rs2 and the tworesistances Rp2,

a third π-structure comprises the resistance Rs3 and the two resistancesRp3,

a fourth π-structure comprises the resistance Rs4 and the tworesistances Rp4,

a fifth π-structure comprises the resistance Rs5 and the two resistancesRp5.

The output of the resistance network is made at point S via thepolarization resistance Z connected at the input of the conversion means203, said conversion means having an input impedance Zin.

The resistances Rsi and Rpi (for I=1 . . . 5) of each n-structure arechosen so that the equivalent impedance seen at each node of theπ-structure is equal to the equivalent impedance of the resistancenetwork seen from the output. For this purpose, the resistances Rsi andRpi of each π-structure are chosen such that: $\begin{matrix}{{\frac{Rsi}{Z} = {0.5*\left( {10^{{ATT}/10} - 1} \right)*\sqrt{\frac{1}{10^{{ATT}/10}}}}}{and}} & {{Eq}.\quad 1} \\{\frac{Rpi}{Z} = \left( {\frac{\left( {10^{{ATT}/10} + 1} \right)}{\left( {10^{{ATT}/10} - 1} \right)} - \frac{1}{Rsi}} \right)^{- 1}} & {{Eq}.\quad 2}\end{matrix}$

where ATT is the attenuation factor in decibels (db) of eachπ-structure.

In order that each π-structure leads to an attenuation ATT close to 3dB, a ratio of the resistances Rpi and Rsi is such that Rpi/Rsi=16. Suchan integer ratio is advantageous since it can be easily implemented.

Each node (A, B, C, D, E, F) of the π-structures is connected to aswitch (SWA, SWB, SWC, SWD, SWE, SWF), the activation of said switchesdefining said attenuation factor. Thus:

the closing of the switch A leads to an attenuation of 6 dB with respectto the level 108,

the closing of the switch B leads to an attenuation of 9 dB with respectto the level 108,

the closing of the switch C leads to an attenuation of 12 dB withrespect to the level 108,

the closing of the switch D leads to an attenuation of 15 dB withrespect to the level 108,

the closing of the switch E leads to an attenuation of 18 dB withrespect to the level 108,

the closing of the switch F leads to an attenuation of 21 dB withrespect to the level 108.

The range of attenuation of the regulating system according to theinvention therefore extend over a range of 21−6=15 dB.

An attenuation of x dB carried out by the attenuation means 201 leads toan increase of x dB in the amplified signal 108.

The equivalent output impedance of the programmable attenuator 201 isidentical irrespective of the attenuation factor chosen.

The switches (A, B, C, D, E, F) are advantageously activated by acommand word (SA, SB, SC, SD, SE, SF) delivered by a digital bus 301,for example a bus according to the I²C standard.

FIG. 4 shows one embodiment of the conversion means 203 for convertingan attenuated signal 202 according to the invention.

The conversion means 203 comprise processing means which generate anoutput signal 204 that is proportional to the square of the effectivevalue of said attenuated signal 202. For this purpose, the conversionmeans 203 may comprise for example, connected in series, a Gilbert cell401 (known as such by a person skilled in the art) for generating anintermediary signal having a level proportional to the square of theattenuated signal 202, and a filter 402 applied to said intermediarysignal for eliminating the 2nd order harmonics and for keeping only thelow-frequency component.

The square of the effective value 204 of the attenuated signal 202 isthus compared with the reference level Vref by means of the voltagecomparator 205. This comparator 205 comprises a voltage/currentconverter 403 for outputting an output current I_(AGC) having a valuethat is proportional to the difference ε between the output signal 204and the reference level Vref. The converter 403 is thus governed by theequation:I_(AGC)=K.ε  Eq. 3

where K is a constant that can be adjusted.

The voltage/current converter 403 can advantageously be parameterizedusing a control signal 404 that provides information about the value ofthe constant K. This constant K allows to vary the time constant of theregulating system:

-   -   a low value of K leads to a high time constant (slow response of        the regulating system),    -   a high value of K leads to a smaller time constant (rapid        response of the regulating system).

Such a regulating system may advantageously be integrated in anintegrated circuit, for example in an integrated circuit comprising amixer/oscillator controlled by a phase-locked loop (PLL).

Such a regulating system may also advantageously be implemented in atuner, such as depicted in FIG. 2, dedicated to the reception of bothdigital and analog radio-frequency signals, in applications using wiredor wireless transmission.

1. A regulating system for regulating, with respect to a reference level(Vref), the level of an amplified signal (108), said regulating systemcomprising: attenuation means (201) for generating an attenuated signal(202) from said amplified signal (108) according to a programmableattenuation factor, conversion means (203) for converting saidattenuated signal (202) in order to generate an output signal (204)intended to be compared with said reference level (Vref).
 2. Aregulating system as claimed in claim 1, wherein: said attenuation means(201) comprise a network of resistances (Rp1, Rs1, Rp2, Rs2, Rp3, Rs3,Rp4, Rs4, Rp5, Rs5) defined by a set of π-structures connected inseries, each node (A, B, C, D, E, F) of the π-structures being connectedto a switch (SWA, SWB, SWC, SWD, SWE, SWF) intended to be activated fordefining said programmable attenuation factor, said conversion means(203) comprise processing means (401, 402) for generating said outputsignal (204) with a level proportional to the square of the effectivevalue of said attenuated signal (202).
 3. A regulating system as claimedin claim 2, wherein the switches (SWA, SWB, SWC, SWD, SWE, SWF) areintended to be activated by a command word (SA, SB, SC, SD, SE, SF)delivered by a digital bus (301).
 4. A regulating system as claimed inone of claims 1 to 3, comprising a voltage comparator (205) including anadjustable voltage/current converter (403), for generating an outputcurrent signal I_(AGC) being proportional to the difference between saidoutput signal (204) and said reference level (Vref).
 5. An integratedcircuit comprising a regulating system as claimed in one of claims 1 to4.
 6. A tuner comprising a regulating system as claimed in one of claims1 to 4.